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Personal information
- Organizations
- Ordine degli Ingegneri della Provincia di Caserta, Italy.
- Groups
-
Professional experience (20 years, 1 month)
-
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Jul 2010
- present
(1 year, 11 months)
-
(Only visible for registered members)
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Jul 2010
- present
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Feb 2011
- present
(1 year, 4 months)
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Intel Mobile Communications GmbH
Industry: Semiconductors
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Feb 2011
- present
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Oct 2009
- May 2010
(8 months)
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Qeron Technology GmbH & Co. KG, Starnberg, Germany
Industry: Semiconductors
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Oct 2009
- May 2010
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Mar 2006
- Dec 2008
(2 years, 10 months)
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Senior Manager Roadmap Management.
QIMONDA AG, Gustav-Heinemann-Ring 212, D-81739 Munich, Germany, http://www.qimonda.com
Industry: Semiconductors
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Mar 2006
- Dec 2008
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May 2000
- Feb 2006
(5 years, 10 months)
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Staff Engineer SRAM/ROM development.
INFINEON TECHNOLOGIES AG, Balanstr.73, D-81541 Munich, Germany, http://www.infineon.com
Industry: Semiconductors
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May 2000
- Feb 2006
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Sep 1998
- May 2000
(1 year, 9 months)
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IPM Group, PO.BOX 152, I-80022 Arzano NA, Italy, http://www.ipmgroup.eu
Industry: Telecommunication
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Sep 1998
- May 2000
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Jul 1991
- Aug 1998
(7 years, 2 months)
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Digital/analog circuit design engineer – Wireline communication.
IPM Group, PO.BOX 152, I-80022 Arzano NA, Italy, http://www.ipmgroup.eu
Industry: Telecommunication
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Jul 1991
- Aug 1998
- Employment status
- Seeking employment
Educational background
- Oct 1982 - Jul 1991
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Universita´ degli Studi Federico II, Naples, Italy
Electronic Engineering, Engineer
Biomedics
- Languages
- German (Good knowledge), English (Fluent), Italian (First language), French (Basic knowledge)
About me
· M.Di Ronza, O.Picot, V.Schoeber - “Circuit device having a fuse.”,
Patent no. US6757204, “Eine zentrale Fusebox für Schaltungen zum
programmieren von Redundanzen mit einem konfigurierbaren
Schieberegisterpfad.” Patent no. DE10155620.
· G.Lehmann, M.Diel, M.Di Ronza - “Speichervorrichtung mit Fuse-
Speicherelementen”, Patent no. DE102005061719, Patent pb. no.
US2007165466, JP2007172821.
· V.Schoeber, M.Di Ronza, Y.Martelloni - “Integrated memory and
method for testing an integrated memory.” Patent no. US7237153 -
“Integrierter Speicher und Verfahren zum Testen eines integrierten
Speichers.” Patent no. DE10256487.
· M.Di Ronza, Y.Martelloni - “Memory built-in self repair (MBISR)
circuits/devices and method for repairing a memory comprising a
memory built-in self repair (MBISR) structure.” Patent no. EP1447813,
Patent pb. no. US2004225912.
· M.Di Ronza, A.Olbrich - “Verfahren und Vorrichtung zur
Fehlerkorrektur bei einem digitalen Speicher” Patent no. DE
10334520; “Method and device for correcting errors in a digital
memory” Patent pb. no. US2005/0066224.
· M.Di Ronza - “Using Assertion Based HDL Simulation to estimate the
fault coverage of memory tests.” Veröffentlichung Nr.
IPCOM000130725D, SIEMENS AG 2005.
September 2nd, 2010
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