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FPGA Design/Mapping Trainer (f/m)

Harvey Nash plc Villach

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Harvey Nash GmbH supports many of Germany's leading organisations to source, recruit and manage the highly skilled IT and engineering talent they need to succeed in an increasingly technology-driven world.
We offer some of the most interesting and challenging roles where you get to work with the latest IT Technologies with some of the biggest clients in Germany.
For our client, a global Telecommunications company we are looking for an FPGA Design/Mapping Trainer (f/m) to conduct a 3-day training in Villach, Austria.

Training date: early March 2019
Location: Villach
Languages: English

Tasks:

- to conduct a custom FPGA Design/Mapping Training for 10 consultants.

Training scope:

- Design Guidelines for Arria10/Stratix10 (eg. Illegal or problematic for mapper, FSM, LUT, RAM, multiplier)
- Simulation of FPGA components (Serdes, PLL, etc)
- IP selection (PCIe)
- Bus systems
- Quartus based simulation environment: overview
- Platform designer
- Incremental Mapping
- Hierarchical Mapping
- Hyperflex architecture

Skills:

- Expert knowledge in the area of FPGA design and mapping
- Practical training experience nice to have

If you are interested in this vacancy, we would be pleased to receive your updated CV, availability and your salary expectations.
Please feel free to contact me if you have any questions.

Marta Matejczyk
Candidate Relationship Manager
Harvey Nash

E: marta.matejczyk@harveynash.de
T: 0049 (0) 8983930621
M: 0049 (0) 151 55003345

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