Ing. Bhavin Dhola

This thesis describes the design of highly efficient Approximate adder and Hardware accelerator using Qsys and Nios Ⅱ Sbt. The work was focused on the design of Custom Instruction and Hardware accelerator and efficient implementation of multicore embedded system using Altera DE2-115 development board through which different Software programs for approximation techniques can be tested on a later stage.

Physical , Chemical , Optical and automobile sensors, Pattern recognition, Realtime data processing, Native signal processing , bus system and Network

Electronics, Analog and Digital circuits, Microcontroller Application, Digital signal processing, VLSI and Embedded System