Masthan Reddy Devalla
Angestellt, Director Functional Verification & Methodology, Infineon Technologies AG, Munich
Munich, Deutschland
Werdegang
Berufserfahrung von Masthan Reddy Devalla
Bis heute 3 Jahre und 7 Monate, seit Okt. 2020
Director Functional Verification & Methodology
Infineon Technologies AG, Munich
Bis heute 3 Jahre und 7 Monate, seit Okt. 2020
Director Functional Verification & Methodology
Infineon Technologies AG, Munich
Bis heute 4 Jahre und 1 Monat, seit Apr. 2020
Senior Manager Functional Verification & Methodology
Infineon Technologies2 Jahre und 3 Monate, Jan. 2015 - März 2017
Senior Staff Engineer Digital Verification
Infineon Technologies AG, Munich
2 Jahre und 8 Monate, Mai 2012 - Dez. 2014
Staff Engineer Digital Verification
Infineon Technologies AG, Munich
2 Jahre und 4 Monate, Jan. 2010 - Apr. 2012
Senior Verification Engineer
Infineon Technologies Austria
Verification Team Lead, Verification Methodologies, Full Chip Verification, System Verilog OVM, Assertion Based Verification, Coverage Driven Verification, Cadence OVM Register Package, Mentor Verification Run Manager and Fullchip Verification Plan.
3 Jahre und 3 Monate, Jan. 2006 - März 2009
Senior DRAM Design & Verification Engineer
Qimonda AG
Digital Design and Functional Verification of High Speed DRAM Memory Products(DDR3/GDDR5). Responsible for Fullchip Simulations, System Verification, Block Level Digital Design, Timing Accurate Behavioral Models, Post and Pre-Silicon Verification
9 Monate, Apr. 2005 - Dez. 2005
Product Development Engineer
Inifineon Technologies AG
Developing an Efficient Verification Methodology for High Speed and Low Power Complex Memory Architectures, Verification Plans, Functional Coverage, Self Checking Testbenches and Code Coverage.
9 Monate, Juli 2004 - März 2005
Intern
Osram Opto Semi Conductors
Involved in a research project aiming to develop the multi-line addressing driving scheme for Organic Light Emitting Diodes (OLED).
Ausbildung von Masthan Reddy Devalla
3 Jahre und 2 Monate, Nov. 2002 - Dez. 2005
Information and Communication Engineering
Technical University of Darmstadt, Germany
Chip Design, FPGA, Microprocessor, EDA, digital signal processing, Microelectronics , Computer Networks and Mobile Communications, Mixed signal, Analog, Digital Design
3 Jahre, Juni 1998 - Mai 2001
Computer Science
Madras University, Chennai, India
Computer Architectures, Computer Softwares, Computer Networks, Micro Electronics
3 Jahre, Dez. 1992 - Nov. 1995
Diploma in Electronics and Communication Engineering
ESC Govt. College, Nandyal,India
Electronics,Communications,Instrumentation,Computer architecture,Networks & Systems
Sprachen
Englisch
Fließend
Deutsch
Grundlagen