Sharath Chandra Acha
Angestellt, SW Engineering Manager | Product owner | Lead software Architect, Siemens EDA (Siemens Digital Industries Software)
Munich, Deutschland
Über mich
Chief Product owner with several years of experience in Automotive Infotainment solutions. Leading several agile scrum teams towards achieving product goals. Also guiding individual P.O's and domain Architects. In depth knowledge of Hypervisors, Linux, Android Operating systems.
Werdegang
Berufserfahrung von Sharath Chandra Acha
Bis heute 8 Jahre und 5 Monate, seit Jan. 2016
SW Engineering Manager | Product owner | Lead software Architect
Siemens EDA (Siemens Digital Industries Software)
Automotive infotainment systems. Driving multiple Agile scrum teams. Software requirements & Architecture. Hands on knowledge of hypervisors, Linux and Android. ASPICE.
8 Monate, Mai 2015 - Dez. 2015
Master thesis Student
Intel
Design and Implementation of a prototype for pre-silicon protocol stack software verification Framework.
11 Monate, Dez. 2013 - Okt. 2014
Research Assistant
Institute of Integrated systems, Technical University of Munich
Research Project: ARAMiS (Automotive, Railway and Avionics Multicore Systems) Design and Development of Linux device driver for the virtual and physical functions for SR-IOV CAN Controller.(Both PF and VF driver is realized as PCI(e) drivers and utilizes SocketCAN) Project is implemented on Xilinx VC709 FPGA Development Board, where it leverages the SR-IOV (Single Root I/O Virtualization) capabilities, providing near-native performance with a strong spatial isolation to all virtual machines.
2 Jahre und 1 Monat, Juli 2011 - Juli 2013
Software Engineer
Robert Bosch GmbH
Role: Embedded software developer Was Part of Engineering core functions team, which develops Automotive Infotainment systems.
Ausbildung von Sharath Chandra Acha
2 Jahre und 3 Monate, Okt. 2013 - Dez. 2015
Master of science in Communication Engineering
Technical University of Munich
Embedded Systems & Security, Chip Multi-core processors, Advanced Computer architecture, HW / SW Co-design, Electronic Design Automation, System-on-chip technologies, BroadBand communications networks, VHDL lab, SystemC lab, Seminar Topic: Dynamic Cache partitioning Methods in MPSoC systems
3 Jahre und 9 Monate, Sep. 2007 - Mai 2011
Electronics and Communication Engineering
Jawaharlal Nehru Technological University, Hyderabad
C & Data Structures, Computer programming, Object oriented programming, Embedded & Real Time systems, Microprocessors & Interfacing Lab, MicroController & Applications, VLSI Design, Digital Signal processing Lab, Computer Networks, Wireless Communications and Networks, IC applications & ECAD lab
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