Sudha Pattnaik

Hardware Design Engineer

Abschluss: Bachelor of Technology with 9.01 CGPA, Dr. M.G.R. Educational and Research Institute

Munich, Deutschland

Fähigkeiten und Kenntnisse

Concept HDL
Testing
Cadence Pspice
Stress Analysis
MS Office
Python
Performance Analysis
OrCAD
LTSpice
SMath
TINA
DO-254
PSIM
Project management
Process management
DOORS
Team Management for clientele config
Nitro pdf
RoHS
SAP
DO-160 Voltage and Lightning section
Test and Measuring Equipment
Assembly Language
Embedded Systems
Team player
C Programming
Software Integration Testing

Werdegang

Berufserfahrung von Sudha Pattnaik

  • 3 Monate, Sep. 2020 - Nov. 2020

    Board Design Engineer

    AES Aerospace Embedded Solutions GmbH (On behalf of Nash Direct)

    Sensor Signal Conditioning and Analysis

  • 9 Jahre und 4 Monate, Mai 2011 - Aug. 2020

    Project Lead

    L&T Technology Services Limited

    Compliance Engineering, Obsolescence management, Components’ affiliation towards safety scales and standards, Requirements management, Redesigning with functional equivalence, Test case manual and test Instruction report, Project management, Sole responsibility for complete clientele work progress and database management, Hardware verification

  • 2 Monate, Mai 2020 - Juni 2020

    Software Test Engineer

    SMR Automotive (On Behalf LTTS)

    Software Integration Testing for Camera Management System in ADAS platform

  • 4 Jahre, Mai 2016 - Apr. 2020

    Hardware Design and Verification

    Collins Aerospace (On behalf of LTTS)

    Design and Functional verification - Schematic design, Performance and Stress analysis, tolerance and derating estimation, Development Testing, Constant usage and new input proposition for the various work standards and instructions used in hardware development PDLC cycle, , Hardware- Software Integration Testing, Process database management and traceability

  • 1 Jahr und 5 Monate, Juli 2009 - Nov. 2010

    Research assistant

    Indian Institute of Technology, Madras

    DSP Programming, Involved in digital circuit design using Bluespec verification

Ausbildung von Sudha Pattnaik

  • 3 Jahre und 10 Monate, Aug. 2005 - Mai 2009

    Electronics and Communication Engineering

    Dr. M.G.R. Educational and Research Institute

    Electronics Circuit theory, Microprocessor Assembly programming, Technical English, Measurements and Instrumentation, Management and Organizational Behaviour

Sprachen

  • Englisch

    Muttersprache

  • Deutsch

    Gut

  • Hindi Fluent

    -

  • Odiya Fluent

    -

Interessen

Technical and Hobby Writing
Classical Singing
Programming

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