Lucas Caetano Meireles Pereira

Abschluss: Bachelor, Federal University of Rio Grande

Rio Grande, Brasilien

Fähigkeiten und Kenntnisse

FPGA Design
Embedded Systems
VHDL Development
C (Programmiersprache)
C++
FPGA Entwicklung
Hardwareentwicklung
Factory Automation
Ladder platforms
Robotics
MatLab
Softwareentwicklung
SQL Server
Python
Digital image processing
FIFO
UART
SPI

Werdegang

Berufserfahrung von Lucas Caetano Meireles Pereira

  • Bis heute 4 Jahre und 11 Monate, seit Juni 2019

    Researcher

    Federal University of Rio Grande

    Develop Hardware and Software solution for different projects within the Nautec lab (Robotics and Smart Automation nucle). This include, embedded C/C++ development; use single board computers, such as raspberry Pi and Odroid in image processing and robotics; Fpga prototyping using VHDL for image processing and comunication across devices.

  • 4 Monate, Jan. 2019 - Apr. 2019

    Automation Analyst

    Torfresma Industrial

    Propose and build up software solutions to be used in conjunction with the hardware and mechanical systems available within the company to develop automation systems for industrial environments. Heavy use of structured text and ladder language to program PLCs to control the automation systems and communicate with external software.

  • 4 Monate, Sep. 2018 - Dez. 2018

    Temporary Intern

    Federal University of Rio Grande

    Collect data on maintainability of mobile FPGA-controlled system present in LIFE (Fluid-Structure Interaction Laboratory); Study the possibility of replacing the system's FPGA with a more modern one and ascertain costs; Assist other students in work involving mobile system within the laboratory.

  • 2 Jahre und 9 Monate, Nov. 2015 - Juli 2018

    Scholarship for Research Project

    Federal University of Rio Grande

    Hardware description using VHDL language, development modules for robotic project within welding context. The modules developed include: communication via modbus, float point unit, filters and debounce modules for read signals, encoder decoder, Finite state machine to perform welding routines, edge detection, FIFOs and other data structures.

  • 1 Jahr, Apr. 2014 - März 2015

    Scholarship for Research Project

    Federal University of Rio Grande

Ausbildung von Lucas Caetano Meireles Pereira

  • 6 Jahre und 11 Monate, März 2012 - Jan. 2019

    Computer Engineering

    Federal University of Rio Grande

    Vhdl, FPGA, Embedded Systems, Image processing, Computer Architectures.

Sprachen

  • Englisch

    Fließend

  • Portugiesisch

    Muttersprache

Interessen

History
Astronomy
Physics

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