Hayk Petrosyan

- Advanced high-speed interfaces implementation on FPGA - PCIe interface design and verification for PCRAM SOC - Compute Express Links (CCIX) interface integration in Soc, test in FPGA using UVM - Top level verification of PCRAM SoC using UVM, Ultrascale FPGA - Tensorflow, opencv based computer vision algorithms implementation on RTL using HLS - Created UVM test-bench for top L3 level SOC - Implemented AP communication with Host on FPGA - Support PCB team to design FPGA based test board for SoC

- Developed Computer Tomography(CT) scanner product PCB - Contributed Magnetic Resonance Imaging (MRI) product electrical part development - Responsible for human sensors data collection and parsing PCB, ASIC design in MRI system - Created top level verification environment for MRI system using UVM - Lead the creation and setup of FPGA design infrastructure - Technical leader of the FPGA infrastructure group - Created DDR in-house controller verification environment using UVM (>90% coverage)

Conduct lectures and practical VLSI courses for bachelor and magister students in the department of Radiophysics: Logic Design – the course includes Boolean theory, combination and sequential logic, FSM machines, Verilog language, basics of synthesis theory. Design flows based on EDA tools – introduction course to existing design creation flows by using Synopsys tools. For more details please visit the following page: https://sites.google.com/site/ysulogicdesign/

-Created Verilog, SystemVerilog, UVM netlist generators for AMS designs -Main responsible for Simulation Analysis Environment (SAE) product -Contributed in development and verification of BIST/BIRA controller -Verified pre tape-out checklist for customers Soc, >10 tape-outs -Mentored customers during BIST RTL generation, top RTL level verification, -Analyse STA issues received on customer SoC, after IP integration

Verify one of company products, which is cost-saving conference server. The product was fully designed and manufactured by the company. Develop and organize new testing scenarios for the separate part of the conference server, called policy server. The policy server checks all participants and allows connections to conference.

Research and development of power consumption reduction methods in integral circuits