Roní Gonçalves

Basic

Bis 2020, FPGA/ASIC Digital Design Engineer, CEITEC S.A.

Lecce, Italy

Timeline

Professional experience for Roní Gonçalves

  • 1 year and 3 months, Sep 2019 - Nov 2020

    FPGA/ASIC Digital Design Engineer

    CEITEC S.A.

  • 7 months, Mar 2019 - Sep 2019

    Electronics Engineer

    RE:Lab S.r.l.

  • 1 year and 2 months, Feb 2017 - Mar 2018

    Continuity and Availability Analyst

    ALGAR Telecom

Educational background for Roní Gonçalves

  • 9 months, Feb 2018 - Oct 2018

    Microelectronics

    Universidade Federal de Minas Gerais

    Microelectronics

  • 1 year and 2 months, Jun 2015 - Jul 2016

    Microelectronics

    Universidade Federal do Rio Grande do Sul

    Digital IC Design

  • 5 years and 7 months, Aug 2009 - Feb 2015

    Electrical engineering

    Universidade Federal de Uberlândia

    Automation & Control Systems

Languages

  • English

    Fluent

  • Italian

    Fluent

  • French

    Fluent

  • Portuguese

    First language

Browse over 20 million XING members