Senior Digital ASIC Design Engineer Synthesis (m/f/d)
Senior Digital ASIC Design Engineer Synthesis (m/f/d)
Senior Digital ASIC Design Engineer Synthesis (m/f/d)
Senior Digital ASIC Design Engineer Synthesis (m/f/d)
Advantest Europe GmbH
Halbleiter, elektronische Bauteile
Böblingen
- Art der Beschäftigung: Teilzeit
- 76.000 € – 106.500 € (von XING geschätzt)
- Vor Ort
Senior Digital ASIC Design Engineer Synthesis (m/f/d)
Über diesen Job
Über uns:
IoT, 5G and Artificial Intelligence. Unthinkable without us. More than half of all the microchips produced worldwide first pass through our hands. As the global market leader of automated test systems in the semiconductor industry we help the world to realize the digital transformation, enable our customers to shape the future and offer you
Aufgaben:
- Join a global, highly skilled engineering team at the heart of Advantest's cutting edge IC test solutions. As a Digital ASIC Design Engineer, you will help create the key technologies that enable the next generation of semiconductor testing.
- You will work on complex mixed signal ASICs used in Advantest's industry leading testers, taking digital modules and subsystems from first concept all the way to silicon in the final system, giving
- In this role, you will collaborate closely with system architects and design engineers. You will generate constraints for synthesis of IP blocks and the chip top level integration. You will analyze critical paths for robust designs, keep power consumption under control, solve challenging technical problems, and deliver high quality results on schedule and at scale.
- Job Duties & Responsibilities
- Architecture development for CMOS designs
- Design and RTL coding of digital and full-custom modules
- Verification on module and chip level including test plan/cases generation.
- Documentation of implemented functionality
- Constraint generation and synthesis of IP blocks and the chip top level
- Analysis of timing and power consumption
- Support for floor-planning and physical design
- Close collaboration with design partners
Qualifikationen:
- University degree, Diploma or BS EE
- Background in digital design (SOC), Application Specific Integrated Circuit (ASIC) design methodologies and silicon development cycle
- Experience in Register Transfer Level (RTL) coding (Verilog and System Verilog)
- Experience with standard simulation tools for digital designs
- Basic knowledge about UNIX* or Linux* environment and using programming languages
- Technical communication, team work and problem solving skills
- English language skills
Wir bieten:
- Flexibility
- Benefits
- Development
- Fitness
- Security
- Flexible and trust-based working hours, 30 vacation days + option for additional vacation days, mobile working, individual part-time models and programs for extended periods of absence
- Attractive salary, share in Advantest´s success through our exceptionally appealing bonus program as well as numerous subsidies, discounts and offerings (e.g. bike leasing)
- Structured onboarding programs and mentoring, development discussions, technical and soft skill trainings, language courses and knowledge sessions
- Ergonomic working environment, sports and fitness options and events (e.g. Global Challenge) as well as health days
- Attractive company pension scheme, comprehensive insurance coverage and support in emergency situations
Unser Kontakt:
Take your next career step with us! Apply now, preferably via our online application tool.
If you have any questions, Alena Nicolai will be happy to answer them at
+49 (0) 7031.204.8380
For further information visit: www.advantest-career.de
