The Role:

We are seeking a Power Integrity Simulation Engineer to own the modeling, simulation, and optimization of the power delivery network (PDN) for our accelerator boards. You will work closely with power, board design, and package teams to ensure stable, low‑noise power for high‑current accelerator SoCs and memory operating at leading‑edge process nodes.

Key Responsibilities:

• Develop detailed PDN models for accelerator boards (VRM to die), including planes, vias, decoupling capacitors, connectors, and packages.
• Perform frequency‑domain and time‑domain PI simulations to:
• Optimize decoupling strategy
• Control impedance over target frequency ranges
• Minimize voltage droop, noise, and resonances
• Collaborate with power and PCB teams to drive layout guidelines and stack‑up decisions based on PI analysis.
• Work with SI engineers to understand coupling between high‑speed interfaces and PDN.
• Support power design engineers in component selection (VRMs, bulk and ceramic caps, ferrites, etc.).
• Correlate simulation results with lab measurements (Bode plots, impedance, transient response).
• Provide PI constraints and sign‑off criteria for new designs and design revisions.
• Document simulation methodologies, models, and results; create reusable templates and flows for future programs.

Minimum Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• 3+ years of experience in Power Integrity or closely related SI/EMC roles at the board or package level.
• Hands‑on experience with PI simulation tools (e.g., CADENCE PowerSI, PowerDC, OptimizePI, VRM simulation (SIMetrix/SIMPLIS), etc.).
• Solid understanding of:
• PDN design concepts, target impedance, and decoupling strategies
• Transmission line theory, return paths, and via behavior
• Ability to interpret and generate S‑parameters and SPICE models.
• Experience working with PCB stack‑up definitions and working with layout teams.

Preferred Qualifications:

• Experience supporting high‑current, high‑power accelerators, CPUs, GPUs, or FPGAs.
• Familiarity with package/board co‑simulation flows.
• Experience with lab validation of PDN characteristics (vector network analyzers, current probes, etc.).
• Scripting skills (Python, MATLAB, or similar) for data analysis and flow automation.

What We Offer?

• A chance to work on one of the most transformative AI and silicon engineering companies in Europe with cutting-edge technology and industry leaders.
• We offer a remuneration package that values your experience.
• We believe in investing in our employees and providing them with opportunities for growth and career development.
• Work in a hybrid environment with flexible scheduling.
• Join an innovative team and experience company growth.
• Opportunity to travel to other countries in Europe to meet the teams, collaborate and drive solutions.
• The role is based in Karlsruhe (Germany) but open to be in Barcelona (Spain) too.

We are looking for outstanding people willing to join our mission to change the silicon industry and help build a better world. If you identify with Openchip, please contact us.

At Openchip & Software Technologies S.L., we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued, respected, and empowered to reach their full potential—regardless of race, gender, ethnicity, sexual orientation, or gender identity.