Job Sector: Semiconductor / IP
Job Type: Permanent
Location: Aix-en-Provence, France

This role is working with an international semiconductor company looking for a design integrator and tester to join their PCIe / CXL Validation team

Brief:
The role will involve simulation of the designs, synthesis, timing closure and integration in Hardware using cutting edge FPGA (Agilex-I / Virtex-Ultrascale+ / Versal Premium) pushed to their limit. This also involves in-system debug on advanced server platforms.

Responsibilities:
Define reference design / example architectures to best demonstrate features of PCIe / CXL controller IP
Develop (Verilog) these designs
Perform simulation with various simulators
Perform FPGA synthesis implementation flow
Perform timing closure

Integration of Real Time Operating Systems on FPGA/SOC CPUs (Versal Premium)
Development (RTL, Hardware, software) of innovative demos and represent the client at Tradeshows

Experience Required:
Bac +4/+5 or more in Electrical science, Computer science or equivalent.
5+ years of experience with RTL Design in FPGA and hardware integration
RTL Simulation : Questa / VCS / NCSIM
FPGA flows : Vivado / Quartus
Timing closure, debugging : Verilog (Quartus/Vivado)
RTOS skills on last generation SOC (Versal Premium)
PCIe/CXL knowledge
CI : Python / Jenkins / GIT

If you’re interested in learning more, please reach out to daniel@microtech-global.com

Thanks!

19003UAR