Faishal Talukder

Development and implementation of various hardware accelerators for FPGA-based drive control systems for machine tools and industrial robots  Development and implementation of the interface between digital module on FPGA and external systems.  Digital design using VHDL for FPGA.  Hardware: nios II(embedded processor), Altera FPGA .  Software: Quartus II, Qsys, ModelSim.

Design and Implementation of a High-Speed Architecture for Parallel Connected Component Analysis (CCA) on a Programmable SoC  Analysis of the image processing algorithm called CCA; partition the algorithm into sequential and parallel parts.  Design and implement the CCA architecture as hardware-software co-design on the Xilinx Zynq platform.  Hardware: Xilinx Zynq 7000.  Languages: VHDL, C, Python.  Software: ModelSim, Vivado, gcc compiler.

Development of microcontroller based embedded control system for robotic leg  Development of a PID controller for robotic legs.  Development and implementation of the control system by using microcontroller, sensors and actuators.  Communication between different hardware components through CAN-Bus.  Documentation of the design and results.  Hardware: Microcontroller-Microchip, Servo motor, DC motor, analog sensor, motor encoder, CAN bus.

Design and implementation of a FPGA based hardware accelerator for optical navigation algorithms used in space flight  Develop and test image processing algorithm in Matlab.  Design hardware architecture of the algorithm.  Implement and test the design on FPGA.  Documentation of the design and results.  Hardware: Virtex 5 FPGA, MicroBlaze Soft Processor Core.  Software: Xilinx XPS, Xilinx ISE, ModelSim.  Languages: MATLAB, VHDL, C.

Test and modification of OpenGL ES 2.0 based graphics application using C  Analyzing, writing, testing and documenting C codes for a given algorithm on OpenGL ES 2.0 platform.

Lecturer for bachelor engineering students at the department of Electrical and Electronic Engineering (EEE)  Giving lectures to bachelor engineering students.  Supervising bachelor project and thesis works.

VHDL modeling, synthesis and implementation of FPGA based floating point arithmetic device