
Jörg Zirbesegger
Bis 2016, Senior Project Manager & Segment Program Manager, NXP Semiconductors Austria GmbH
Gratkorn, Austria
Werdegang
Berufserfahrung von Jörg Zirbesegger
- Current 6 years and 8 months, since Oct 2019
Senior Principal Project Manager
NXP Semicondutors
- 3 years and 1 month, Sep 2016 - Sep 2019
Principal Project Manager
NXP Semicondutors
- 1 year and 4 months, May 2015 - Aug 2016
Senior Project Manager & Segment Program Manager
NXP Semiconductors Austria GmbH
- 8 years, Jun 2007 - May 2015
Project Manager
NXP
Leading a multi site ( Europe, Far East) IC-Industrialization project (FAB transfer).
- 1 year and 1 month, Dec 2010 - Dec 2011
Project Lead for IC Verification and Validation
NXP
Leading the V&V team. Introduction of a new V&V Flow.
- 8 months, Oct 2006 - May 2007
Master Thesis
NXP
Master Thesis: "Amplification systems for 13.56MHz Proximity RFID Reader"; Publication: "Extending the analogue performance of integrated 13.56 MHz proximity reader chips"
- 4 months, Feb 2006 - May 2006
Test Engineer
Nextgen Technology Ltd
Bluetooth application testing
Ausbildung von Jörg Zirbesegger
- 9 months, Oct 2005 - Jun 2006
Telecommunications
University of Wales Swansea
Wireless systems
- 4 years and 7 months, Oct 2002 - Apr 2007
Electrical Engineering (Telecommunications)
Technical University Graz
RFID; HF Systems, Electronics
- 4 years and 9 months, Oct 1996 - Jun 2001
Electronics and Power Engineering
HTL Kapfenberg
Sprachen
English
C1 (Fließend)
German
C2 (Verhandlungssicher / Muttersprachlich)
