
Lucas Manço
Fähigkeiten und Kenntnisse
Werdegang
Berufserfahrung von Lucas Manço
- Current 3 years and 11 months, since Jul 2022
Senior FPGA Engineer
TechSAT GmbH
- Developing FPGA Systems for Aeronautic Industry compliant to DO-254, which includes requirements definition and analysis, firmware architecture definition, codification, simulation and tests; - Defined process and developed software (Python Tools and Yocto Distribution) and hardware to integrate simulations and FPGA hardware test; - Developed IP Cores to integrate the FPGA Products of the company such as ARINC 825 CAN, motor controller and proprietary components.
- 4 years and 6 months, Feb 2018 - Jul 2022
FPGA Engineer
Embraer S.A.
- Developed FPGA firmware for Radar Systems (Embraer Radars M60M and M200) and Avionics Systems (MEC - Multipurpose Electric Controller) following the standard DO-254; - Defined requirements and architecture for the FPGA firmware; Developed FPGA logic in VHDL, HDL Coder Matlab Tool Box and Xilinx System Generator; - Developed Python tools to generate test vectors and assemblers to proprietary IP Cores Opcodes.
- 1 year and 10 months, Apr 2016 - Jan 2018
FPGA Designer Intern
Bradar
- Developed programmable logic in VHDL for FPGA for Radars using the VUnit Framework to simulate.
Ausbildung von Lucas Manço
- 5 years and 11 months, Feb 2012 - Dec 2017
Mechatronics, Systems Engineering
State University of Campinas
- 5 years and 11 months, Feb 2012 - Dec 2017
Mechatronic Engineering
State University of Campinas
- 5 years and 11 months, Feb 2012 - Dec 2017
Mechatronic Engineering
State University of Campinas
Linux Interface to Support Partial Reconfiguration in Real-Time of FPGAs: Developed a Linux interface to support partial reconfiguration of FPGA in execution time. The main goal of this purpose is create an abstraction layer for the digital system developer, which provides a compatibility for the application runs in others target systems (e. g. SoC).
- 5 years and 11 months, Feb 2012 - Dec 2017
Control and Automation Engineering
State University of Campinas
Linux Interface to Support Partial Reconfiguration in Real-Time of FPGAs: Developed a Linux interface to support partial reconfiguration of FPGA in execution time. The main goal of this purpose is create an abstraction layer for the digital system developer, which provides a compatibility for the application runs in others target systems (e. g. SoC).
- 5 years and 11 months, Feb 2012 - Dec 2017
Control and Automation Engineering
State University of Campinas
Linux Interface to Support Partial Reconfiguration in Real-Time of FPGAs: Developed a Linux interface to support partial recon- figuration of FPGA in execution time. The main goal of this pur- pose is create an abstraction layer for the digital system devel- oper, which provides a compatibility for the application runs in others target systems (e. g. SoC).
- 5 years and 11 months, Feb 2012 - Dec 2017
Control and Automation Engineering
State University of Campinas
Linux Interface to Support Partial Reconfiguration in Real-Time of FPGAs: Developed a Linux interface to support partial recon- figuration of FPGA in execution time. The main goal of this pur- pose is create an abstraction layer for the digital system devel- oper, which provides a compatibility for the application runs in others target systems (e. g. SoC).
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