Dr. Bojan Jovanovic

Firmware development for IoT asset trackers and e-bike control and connectivity

Hardware and firmware development for various wearable products. Participating in every step of the product development cycle. Technical environment, tools and languages used: -> nRF51/52 SoC from Nordic that runs Zephyr RTOS. nRF Connect SDK IDE. C/C++ -> Altium Designer for hardware development (schematic and PCB layout)

Development of haptic device that pairs and interacts with VR headsets. Tech lead. Technical environment, tools and languages used: -> Nordic’s SoCs from nRF52 and nRF53 family running Zephyr RTOS. -> PlatformIO environment integrated with Visual Studio Code used for application development in C/C++. -> Altium Designer for hardware development (schematic and PCB layout)

Embedded Systems Designer in charge of developing new devices. Involved in hardware design, firmware design and software design. Altium Designer, Real-Time Operating Systems (Zephyr, freeRTOS) and Yocto Linux is something I am using on a daily level.

Hardware/Firmware development of a personal mobile Carbon Monoxide (CO) Breath Sensor device. The device is capable of measuring user’s level of CO in their exhaled breath and transfer the measurement results over Bluetooth Low Energy (BLE) link to the smartphones. Technical environment, tools and languages used: * nRF52840 SoC from Nordic running bare metal C. * Python tool for scripting and automation. Visual Studio and C#. * Altium Designer for hardware development (schematic and PCB layout).

Developing high speed USB 3.0 medical cameras based on IMX250/253/420 CMOS sensors from Sony. The cameras are able to deliver Ultra HD (4K) video streams that will help in early detection of various cancers. Technical environment, tools and languages used: -> EZ-USB FX3 SuperSpeed USB3.0 controller from Cypress funning ThreadX RTOS. EZ-USB FX3 SDK IDE. C/C++ -> Cyclone V FPGA from Intel/Altera. QuartusII IDE. SystemVerilog -> Altium Designer for hardware development (schematic and PCB layout)

Future Automotive Computing Environment (FACE) project financed by RenaultNissan Alliance. Digital design and hardware design of a new centralized automotive computing environment. Technical environment, tools and languages used: - Zynq Ultrascale+ MPSoC FPGAs. Vivado IDE. VHDL. PCI Express IP, MIPI CSI-2, TSN Ethernet IP cores used in digital design. Validation using oscilloscopes and Ethernet protocol analyzers (Wireshark). - Cadence OrCAD for schematic design

Working in the field of Embedded Systems design and rapid prototyping developing new embedded devices according to the customer requirements. I cover every aspect of product design cycle including PCB design, assembling and testing, firmware development and Android app development.

- Research on hybrid (volatile/non-volatile), MTJ-based memory cells - Exploring different mechanisms of writing non-volatile data bit: thermal heating, in-plane and perpendicular spin-transfer torque - Evaluation of different NVM cell architectures from size, power, speed perspectives. - Tape-out of a hybrid (MTJ/MOS) memory chip in 28 nm FD-SOI technology

* developing and manufacturing advanced instruments for measuring magnetic fields and electric currents * providing related development and engineering services.

- Digital Systems - Analog Electronics - Digital Signal Processing (DSP) - Modern programmable logic devices - Digital Circuits design - Real-Time Systems