Shreedhar Achar

Working as System Engineer with Modem Architecture team and responsible for Design and development of 5G NR/LTE PHY link level simulator *Responsible for design, scheduling, modelling and debugging of real-time simulation software *Developing 5G NR + LTE PHY algorithms, control software, framework software and verifying new features in simulation model

On assignment: LTE-M Firmware Architect at Intel, Duisburg, Germany(Mar’16-Jan'2018) On Assignment: DSP SW Development Engineer for LTE Multimode eNodeB modem at Alcatel-Lucent (Bell-Labs), Murray hill, NJ, USA (Jan’2015 - Mar’2016) On Assignment: LTE Physical Layer Design Engineer for Ericsson Modems GmbH, Nuremberg, Germany (Feb’2011-Dec’2014)

Responsible for delivery of wireless infrastructure projects, planning, resource assignment, team management and weekly reporting to client on the progress - development of reference modules for UMTS/LTE PHY simulation using C/C++ - development of test suite software for verification of UMTS base station PHY layer functional libraries - reviewing requirement specifications, preparation of design documents, code reviews, writing test requirements, developing of test cases and executing regression tests

Responsible for design and development of DSP software for E1-line card on RTOS -develop the Hard Real Time module for compression (G729) and Echo Cancellation (G168) of voice channels -develop the device driver for FALC (E1 Framer IC from Infineon), handling voice, data and HDLC commands -debug software and hardware - software integration issues using Communication Analyzer, Logic Analyzer, Spectrum Analyzer & Oscilloscope -develop the boot-loader for TI DSP’s

Advanced Microprocessors & Microcontrollers, DSP, Analog and Digital communications, Optical Fiber Communications.