Ing. Subhash Naliyapara

Evaluated PWM methods to optimize control of automotive HV inverters, focusing on reducing switching losses with optimized DPWM. Developed a simulation model for HV inverters with PMSM, analyzing power semiconductor losses and thermal behavior using PLECS, MATLAB/Simulink, and LTspice. Assessed impact on torque and DC link voltage ripple, identifying optimal PWM strategies. Created test plans, and conducted real-time testing to validate results and confirm simulation accuracy.

• Simulated double pulse tests (DPT) for parallel half-bridge discrete MOSFETs to analyze switching behavior, including waveform analysis, losses, and gate driver performance. • Conducted double pulse tests for BRM machine to identify the root cause of power module failures. • Compared static and dynamic characteristics of power MOSFETs from various manufacturers. • Simulated threshold voltage measurements and active short circuit tests for power MOSFETs.

Experienced Power Electronics Engineer with 6+ years in VFD panel design, DC-DC converters, and power converter projects. Led engineering teams, designed control logic, and selected components for VFD systems, ensuring compliance with IEC/ISO standards. Proficient in EPlan P8, CAD, BOM management, and ERP systems. Developed manufacturing and testing documentation, validated control logic, and provided technical support during RFQ and project commissioning. Collaborated on railway battery charger prototypes.

Study content: Construction, simulation and Modeling of Various types of converters, Electric machines and Physical systems in MATLAB/Simulink, Vehicle Management Systems, and Control of drives. Advanced Power electronics, Method of Power Engineering, Control Theory, Modeling of Physical systems, Renewable energy, Hydrogen technology, Electrolyzer, Fuel cells, Sustainable non-fossil Mobility, and Energy Management.

Thesis Topic: Proposed H-bridge with reduced number of switches topology for Multilevel Inverter. Keywords: Multilevel Inverter, Cascaded H-bridge topology, less power MOSFET for 7- level Inverter compared to conventional multilevel Inverter