Abdelmajid Bouajila

Berufserfahrung von Abdelmajid Bouajila

• 1 Jahr und 1 Monat, Sep. 2022 - Sep. 2023

  Functional safety engineer

  Synopsys GmbH

  Functional safety engineer for security IPs

• 2 Jahre und 9 Monate, Dez. 2019 - Aug. 2022

  ASIC functional verification

  Apple Deutschland GmbH

  Digital functional verification of Modem IPs

• 6 Jahre und 7 Monate, Feb. 2016 - Aug. 2022

  ASIC functional verification

  Intel Deutschland GmbH

  Digital functional verification of Modem IPs

• 2 Jahre und 2 Monate, Dez. 2013 - Jan. 2016

  ASIC verification engineer

  Heidenhain GmbH

  Digital functional verification specman e language

• 6 Jahre und 11 Monate, Sep. 2005 - Juli 2012

  Wissenchaftlicher Mitarbeiter

  TU München

  Fault-tolerance in SoC, Computer architecture, Digital IC design, MPSoC, VHDL, FPGA prototyping,

• 5 Monate, Feb. 2005 - Juni 2005

  Master's thesis

  Tima labs

  SoC design. SoC prototyping.

• 6 Monate, Apr. 2004 - Sep. 2004

  Trainee

  Thales Microelectronics

  FPGA based design

• 6 Monate, Sep. 2003 - Feb. 2004

  Diplomarbeit

  Tima labs

  Reliable processor design. Enhancing Cache system with error detection and correction techniques. VHDL

• 1 Monat, Juli 2001 - Juli 2001

  Trainee

  hp

  PC assembling. Team work.