Mahmoud Marzouk

• Applied UVM-SystemC methodology to verify system level design (SystemC). • Built hierarchical environment with register abstraction layer and hierarchical sequences from scratch for block level and system level verification. • Developed verification plans with functional coverage, checkers, and test cases. • Wrote Python script to generate SystemC-UVM Register Models from IP-XACT.

• Digital Design of RTL interface and controller for SNN blocks and their integration into larger systems for in-memory computing in neuromorphic systems.

• Design of a RISC-V project using Verilog, achieving optimized performance and low-power operation. • Responsible for the entire PNR flow for the ORCA TOP chip using ”SAED” 32/28 PDK with 50K-60K gates and operates at 60MHz frequency. • Developed UVM based verification environment for memory block.

Cumulative GPA: 1.9

Cumulative GPA: 1.36 (German Grading System); Graduated with honors, Completing a 5-year program in 4 years only.