Akbar Momin

Angestellt, Senior Analog/Mixed-Signal/Radio-Frequency (AMS/RF) Design & Methodology Expert, Intel Deutschland GmbH
München, Deutschland

Fähigkeiten und Kenntnisse

Cadence Tools
Virtuoso Schematic Editor
Virtuoso (XL) Layout Editor
Diva/Assura DRC/LVS/RCX; Mentor Graphics Tools
Design Architect IC Schematic Editor
IC Station Layout Editor
Calibre DRC/LVS; Synopsys Tools
Design Compiler
Co-Centric System Studio (CCSS); Simulators
Cadence-
Spectre
UltraSim
Mentor-
Eldo
ModemSim
Synopsys-
HSpice
Texas Instruments-
TISpice
Agilent-
ADS
OrCAD-
PSPICE
Berkeley SPICE
(SPICEOPUS/WinSPICE); 3D EM Field Solvers
CST-
Microwave Studio
MIT-
FASTHENRY/FASTCAP; Other Tools
DesignSync Synchronicity Version Control Tool; Op
SUN OS/Solaris
Linux SuSE/RedHat
Openoffice
Microsoft Windows 2000/XP/Vista
Office XP/2003/2007; Programming languages
C
VHDL
Verilog-A/MS
SKILL/OCEAN
AMPLE
HTML
Assembly (Intel x86); Communications Systems: TCP
ATM
WLAN
CDMA
GSM/UMTS.
System-on-Chip (SoC)
Application-Specific Integrated Circuit (ASIC)
Analog/Mixed-Signal (AMS) IC Design
Mixed-Signal Verification
Design Enablement / EDA Strategy
Tool/Flow/Methodology (TFM)
Analog-on-Top (AMS)
Digital-on-Top (DMS)
HDL/RTL Design
Real-Number Modelling (RNM)
SystemVerilog/Verilog-AMS
UVM/UVM-MS
Data Converters (ADC / DAC)
Analog IP (PLL PMU)
SerDes & High-Speed I/O
Cadence/Virtuoso/ADE/Xcelium/Spectre
Synopsys/CustomCompiler/PrimeWave/VCS/PrimeSim
FinFET (FF) / Gate-All-Around (GAA)
Tech node 0.35um~2 nm
PVT Corner Monte-Carlo Variation
Aging Stress EM/IR
AMS Circuit Design & IP Porting
Scripting & Automation
Post-Silicon Validation
Silicon Debug · Multi-Die Systems
UCIe/BoW
Chiplets & 3D-IC Integration
Photonic-Integrated Circuits or Systems (PIC)
Co-Packaged Optics (CPO)

Werdegang

Berufserfahrung von Akbar Momin

  • Bis heute 9 Jahre und 2 Monate, seit Juni 2016

    Senior Analog/Mixed-Signal/Radio-Frequency (AMS/RF) Design & Methodology Expert

    Intel Deutschland GmbH

    • Led SPICE + SV RNM-based mixed-signal verification and portable model handover for IP-to-SoC. • Bridged AMS with UVM-MS DMS flows and enabled converged RNM modeling. • Benchmarked SPICE/FastSPICE tools, optimized debug/runtime across nodes to ~2nm. • Deployed and supported TFM tools, collaborating with EDA vendors. • Reduced verification cost and cycle time by leading tool strategy, methodology rollout, and team training.

  • 2 Jahre und 2 Monate, Apr. 2014 - Mai 2016

    Senior Analog/Mixed-Signal (AMS) Design & Methodology Engineer

    Dialog Semiconductor

    • Led design team across 4 geographies (15+ engineers) for PMIC chip delivery. • Supervised SoC floor-planning to layout freeze process for different ASIC IP blocks (e.g. buck, buck-boost, ADC etc.). • Architected chip top level layout auto routing methodology with design constraints for shift-left chip-level layout closure • Accomplishments: Effectively managed resources to ensure on-time delivery schedule and adherence to tapeout milestones.

  • 3 Jahre, Apr. 2011 - März 2014

    Senior IC Design Engineer (Analog/Mixed-Signal)

    Viimagic GmbH

    • Designed complete analog signal path architecture for HD CMOS image sensors. • Architected mixed-signal and mixed-language co-simulation flow integrating SPICE and behavioral models (Verilog, Verilog-A/AMS, VHDL, and SPICE). • Led chip top-level chip pixel-array/analog/digital IP integration and signoff verification • Accomplishments: Successfully delivered a product from a second foundry source with first-time-right silicon, demonstrating robust design and execution capabilities.

  • 5 Jahre und 1 Monat, März 2006 - März 2011

    Design Engineer, Analog/Mixed-Signal IC Design

    TES Electronic Solutions GmbH

    • Took ownership of SAR/Pipeline ADCs and Resistor-string DACs building blocks design, layout and simulation. • Created structural behavioral models in Verilog-A(MS) and performed IP top level full spec verification • Accomplishments: Earned greater responsibilities by demonstrating strong communication skills and becoming a reliable team player.

  • 1 Jahr und 1 Monat, Jan. 2005 - Jan. 2006

    Masters Thesis Student

    Nokia Research Centre (NRC)

    • Studied the comparative advantages and limitations of various on-chip/off-chip data transmission methods. • Investigated the signal and power integrity issue in on-chip interconnect structures. • Accomplishments: Delivered thesis results within tight deadlines by maintaining strong goal orientation and a proactive, knowledge-driven approach.

  • 6 Monate, Juli 2004 - Dez. 2004

    Student Automation Engineer

    LogicaCMG

    Automatic testing of Nokia mobile phones’ software by writing test scripts to check software functionality, reliability and compatibility with hardware.

  • 3 Monate, Apr. 2004 - Juni 2004

    Student Research Assistant

    Department of Electron Devices and Circuits, University of Ulm

    To assist a Research Scientist (PhD candidate) on RF (mixer) circuit design, test and measurement.

Ausbildung von Akbar Momin

  • 2 Jahre und 11 Monate, Apr. 2003 - Feb. 2006

    Communications Technology

    University of Ulm

    Microelectronics

Sprachen

  • Englisch

    Fließend

  • Deutsch

    Gut

  • Bengali

    Muttersprache

XING – Das Jobs-Netzwerk

  • Über eine Million Jobs

    Entdecke mit XING genau den Job, der wirklich zu Dir passt.

  • Persönliche Job-Angebote

    Lass Dich finden von Arbeitgebern und über 20.000 Recruiter·innen.

  • 22 Mio. Mitglieder

    Knüpf neue Kontakte und erhalte Impulse für ein besseres Job-Leben.

  • Kostenlos profitieren

    Schon als Basis-Mitglied kannst Du Deine Job-Suche deutlich optimieren.

21 Mio. XING Mitglieder, von A bis Z