Alessandro Cornaglia

Implementation of a timing simulator for embedded software considering different ARM processors. The implementation activities required to: • Utilize and modify tools of the LLVM Compiler Infrastructure, • Define a novel automatic algorithm for mapping LLVM IR to binary code, • Study and analyze different ARM processors, • Extract timing and run-time software properties via Lauterbach Trace32 tracer, • Annotate Simulink models with timing information for executing timing-enriched simulations.

Main activities: • New JVM features implementation considering different operating systems (Linux, QNX, VxWorks and Windows), • Development and maintenance of the aicas’s implementation of the Real Time Specification for Java (RTSJ), • Respect of both the company processes and the full software development life cycle.

Main activities have been performed respecting the avionic DO-178B guideline requirements: • Development of test cases from given formal requirements to test low-level code written in Ada language and assembly, • Automatization of testing and analysis procedures, • Study and analysis of the timing behavior of avionic bare metal code, • Generation of the necessary documentation.

Topics: Concurrent and Distributed Systems Thesis: Study and analysis of software-enforced solutions to facilitate the timing analysis for software programs for multicore COTS processors