Angelos Spanos

ConSenSo develops software, firmware and RTL solutions. Our design and verification expertise lies primarily in the following fields: - FPGA and ASIC RTL - Firmware and RTOS - Windows, Linux and macOS drivers We work closely with the client, from specification to implementation and final verification in order to deliver high quality software and firmware systems that cover the application requirements. …

High throughput wireless telecommunication module for ad-hoc networks Responsibilities * System architecture definition * Telecommunications protocol definition * RTL architecture review and additions proposal * MAC firmware review

High throughput wireless telecommunication module * System architecture definition * RTL FPGA code development on Zynq * Synchronization block development in Matlab and Verilog * Zynq ARM processor configuration * ARM Cortex R5 firmware development * Petalinux development

Equine ultrasound probe * Beamformer RTL IP repurpose for higher resolution and smaller depth * Product IDs functionality addition in firmware Easi-Scan Go * Beamformer RTL IP design * Altera Cyclone V ARM Linux kernel compilation flow development * Device tree source development * Filesystem compilation flow development * Boot image development * Firmware design

Subsea Electronic Module controlled via PLC over PROFINET * PROFINET protocol study and implementation planning * Firmware and FPGA architecture specification and development roadmap * Firmware development for HSCAN, FTCAN, serial I2C, and SPI peripherals * Firmware integration into FreeRTOS Sensus Network Interface Card * Implementation specification of HDLC MAC and LLC engine. * Implementation of the HDLC firmware component for both station and access points.

* External RTL IP repurpose from WiFi to LiFi * FPGA soft-core assembler design * FPGA soft-core firmware design * RTOS development on TI DSP/BIOS * Device drivers development for Linux, Windows & OSX * 802.11i encryption modules development

Application specification & development

SPI to SDRAM Interface & SPI to SRAM Interface * Solution architecture specification * Project management * Verilog Design * CPLD Implementation and Verification * Creation of demo for client

iOS application development for real-time sound processing. https://www.youtube.com/watch?v=wxugvrf7l0U

* RTL blocks design and verification for imaging and proximity sensors. * Embedded software design in C for sensor setup and control for 8051. * Testbench port from traditional to UVM

* RTL blocks development and verification for 802.11 IP. * FPGA emulation of large SoC IP

* Analysis of architecture for a customizable LTE error correction unit. * Design in Verilog. * Design of bit-accurate model in Matlab. * Verification was done both on FPGA and in Modelsim * Patented low – area / power implementation of the interleaver / de-interleaver blocks. * Linux driver development for PCI cards. * Linux driver development and embedded software development for device USB bundle.

The design of a system on chip that measures the volatile organic compound concentration. The project is separated in MEMS transducer design and simulation, integrated analogue read-out circuit specification and development, embedded digital and firmware system specification and development.

Diploma Thesis​ : LTE Turbo Encoder / Decoder IP development of bit accurate model and Verilog synthesizable code. Measurements against previously published results on deep error regions were successful leading to the publication of a paper.