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Apratim Gupta

Angestellt, Senior Systems Design Specialist, Thales Canada Transportation Solutions
Abschluss: MSc, Hochschule Darmstadt
Toronto, Kanada

Fähigkeiten und Kenntnisse

Testing and Debugging
VHDL and Verilog Coding
Low Power Circuit Design
Low Power and High speed PCB Design
Xilinx ISE
Altera Quartus II
Modelsim
HEVC
NIOS II
C/C++
Embedded Processors
FPGA-Programmierung
PCB Design
Circuit Design
Zync SOC
CPLD
XILINX SDK
MIG
VIVADO
UART
SPI
RS232
RS422
RS485
HDMI
VGA
Video Processing
Cadence Allegro
Cadence System Planner
CADSTAR
EMI/EMC
Hardware Testing and Debugging
Linux
ASIP
Chipscope
Signal Tap II
Xilinx SDK
IBM DOORS
Systems engineering
Jira
Requirements Analysis
Model-Based System Development
System Design
CENELEC
AREMA

Werdegang

Berufserfahrung von Apratim Gupta

  • Bis heute 7 Jahre, seit Mai 2018

    Senior Systems Design Specialist

    Thales Canada Transportation Solutions

    Responsible for -Safety Critical Systems Design with AREMA and CENELEC. -Conversion of Customer requirements into technical artifacts -System Simulation -System Timing Analysis -Research And Development for applicability of upcoming technologies. -Decision Analysis for upcoming Products. -Technical Support for upcoming Main Processor Units.

  • 1 Jahr und 11 Monate, Mai 2016 - März 2018

    Entwicklungsingenieur in FPGA and IC-Design

    MEN Mikro Elektronik GmbH

    Development and testing of FPGA and IC-Designs for Rugged Computer Boards and Systems for Harsh, Mobile and Mission-Critical Environments using Aviation Safety Standard DO254 and Railway Functional Safety Standards.

  • 5 Monate, Okt. 2015 - Feb. 2016

    Wissenschaftliche Hilfskraft(Research Assistant)

    Hochschule Darmstadt - University of Applied Sciences

    Lab Tutor for Microelectronic Systems Lab (Advanced VHDL Programs and implementation in VIVADO on Xilinx Zynq SOC).

  • 7 Monate, Jan. 2015 - Juli 2015

    Masters Thesis Student

    KIT - Karlsruher Institut für Technologie

    Highly efficient, C++ based open-source, multi-threaded, HEVC/H.265 video encoder. Multi-threading implemented using QSYS & NIOS II Sbt. Design of Specific Hardware accelerators and Custom Instructions in VHDL and Focus on efficient implementation on multicore embedded systems using Altera DE II-115 Development board

  • 2 Jahre und 2 Monate, Dez. 2010 - Jan. 2013

    VLSI Design Engineer

    Bit Mapper Integration Technologies Pvt. Ltd

    Designing of circuits to interface various interfaces (like USB, SD Card, Ethernet etc.) to FPGA on PCB board, and writing test codes in VHDL for testing the interfaces with the FPGA.

  • 4 Monate, Sep. 2010 - Dez. 2010

    Visiting Faculty

    MIT Group of Institutions, Kothrud, Pune

    Responsible for taking Mechatronics lectures for the Final year undergraduate Mechanical Students.

  • 3 Monate, Mai 2009 - Juli 2009

    Verilog Coder

    Indian Institute of Engineering Science and Technology,Shibpur

    Developed codes in Verilog for converting a sequential debugging system to parallel debugging system.

Ausbildung von Apratim Gupta

  • 2 Jahre und 1 Monat, Okt. 2013 - Okt. 2015

    Microelectronics and Embedded Systems

    Hochschule Darmstadt

    -Microelectronic Systems -Signal Processing Hardware -Advanced Embedded Systems -Advanced Programming Technique -Complex Digital Architectures -Design and Test for Microelectronic Systems -Project Management -CMOS Analog Design

  • 4 Jahre, Juli 2006 - Juni 2010

    Electronics and Tele-Communication

    KIIT University, Bhubaneswar

Sprachen

  • Englisch

    Muttersprache

  • Deutsch

    Gut

  • Hindi

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