Ashish Vellora Madathil
Fähigkeiten und Kenntnisse
Werdegang
Berufserfahrung von Ashish Vellora Madathil
- 8 months, Jul 2023 - Feb 2024
AI/ML Engineer
Progenesis India
Developed Image processing pipelines for Embryo Grading and quality assessment
- 2 years and 4 months, Apr 2021 - Jul 2023
Deep Learning Engineer
Biocliq AI - AI for Medical Imaging
- 10 months, Aug 2019 - May 2020
Master Thesis : Domain Adaptation of Synthetic dataset for Object Detection
Technische Universität Chemnitz
Marked and applied segmentation masks for Automated Assisted Living (AAL) dataset with the Computer Vision Annotation Tool.
- 5 months, Mar 2019 - Jul 2019
Growing SOM-like machine learning algorithm using automatic scale selection.
AllBlock UG
- 4 months, Feb 2018 - May 2018
Research Project trainee at Professorship Circuit and System Design
Chemnitz University of Technology
Title: ‘’Position Estimation based on an accelerometer’’ Implementation of a position tracking algorithm into an FPGA based 8052 microcontroller core of a PAFUSI ASIC virtual FPGA core, interfaced to an accelerometer using SPI communication
- 2 months, Aug 2015 - Sep 2015
Student Assistant at Institute of Ion Beam Physics and Materials Research
Helmholtz-Zentrum Dresden-Rossendorf e.V.
- 2 months, Sep 2014 - Oct 2014
Research Assistant at Zentrum für Mikrotechnologien
Chemnitz University of Technology
- 6 months, Apr 2013 - Sep 2013
Project Trainee at Centre for Nano Science and Engineering
Indian Institute of Science
Intra-Cranial Pressure Monitoring based on Piezo-Resistive sensors, Pressure Calibration, Detection of differential sensor output and tabulation to determine sensitivity
Ausbildung von Ashish Vellora Madathil
- Current 9 years and 9 months, since Oct 2016
Embedded Systems
Technische Universität Chemnitz
Design of Software for Embedded Systems Hardware Software Co-design Numerical Simulation with MATLAB Realization of Digital Systems & DSP Components and Architectures of Embedded Systems Real Time Systems
- 2 years and 7 months, Oct 2013 - Apr 2016
Micro and Nano Systems
Technische Universität Chemnitz
Integrated circuit design - Transistor level Smart sensor systems Power semiconductor devices
- 4 years, Sep 2008 - Aug 2012
Electronics & Communication Engineering
Sir M Visvesvaraya Institute of Technology, Bengaluru (India)
Image Processing Digital Signal Processing Fundamentals of HDL Microcontrollers Embedded System Design
Sprachen
English
C2 (Verhandlungssicher / Muttersprachlich)
German
A1-A2 (Grundkenntnisse)
Hindi
Malayalam
Kannada
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