Bhargav Popat

I'm currently working with Expleo Group as a FPGA Engineer with the ADAS Team. Our team works on interfacing various ML & AI models on Xilinx SoCs using VHDL, DNNDK, Vivado HLS, SDK tools. I’m responsible for the development of custom RTL kernels in VHDL, interfacing camera sensors with FPGAs, testing applications on ZYNQ platform in C++ based on project requirements. I have good hands-on experience in complete FPGA development flow and solid understanding of Xilinx and Intel Altera FPGAs.

Master's Thesis Student and Research Assistant working on the topic: Side-Channel Attack resisting building blocks for Post-Quantum Cryptography on FPGAs. - Created a UART interface on Sakura X and Sasebo side channel boards with Spartan6 and Kintex7 FPGAs to test for power side channel attacks - Interfaced 128 bit PQC algorithm for information leakage through power measurements and statistical analysis, later suggesting countermeasures for the same.

Automotive Sensor Systems (Seminar), Digital Logic Design ( VHDL), Materials in Micro and Nano Systems, Micro and Nano Devices, Microsystem Design, Programming in C, C++, Reliability of Micro and Nano Systems, Semiconductor Physics, Smart Sensor Systems, System Design ( VHDL ).