Harald Lorenz

Angestellt, Head of Failure Analysis Department Munich, Infineon Technologies AG, Munich

Munich, Germany


Semiconductor (DRAM) expert
Product development
Product test
Volume ramp (KGD)
Product qualification
Design-in support
Technical customer support
Yield enhancement in high volume manufacturing
Engineering team lead
Design for Test
ATE experience (IMS
Failure analysis and debug (Bench test
Cadence design tool)
Intercultural work experience


Professional experience for Harald Lorenz

  • Current 4 years and 2 months, since Apr 2020

    Head of Failure Analysis Department Munich

    Infineon Technologies AG, Munich

  • Current 9 years and 8 months, since Oct 2014

    Senior Manager Failure Analysis

    Infineon Technologies
  • 2 years and 9 months, Jan 2012 - Sep 2014

    Senior Expert Microcontroller Characterization

    Infineon Technologies
  • 2 years and 5 months, Aug 2009 - Dec 2011

    Senior Engineer

    Micron Technologies

    Responsible for yield/product quality grade improvement on high volume product. Define/maintain yield and quality roadmaps and drive continuous improvement projects to ensure Top-Tier customer requirements. Work closely with process integration team on yield/quality improvement topics (using FMEA, Kepner Tregoe). Analyze non-conforming material for product disposition and root cause identification. Currently focusing on development support for leading edge technology node introduction into manufacturing.

  • 6 months, Feb 2009 - Jul 2009

    Technical Consultant

    Advanced Micro Systems, Inc

    Product portfolio analysis; IP research in motion control market

  • 2 years and 5 months, Sep 2006 - Jan 2009

    Principal Engineer


    Lead international product and test engineering development team for a custom design DRAM product. Definition of DfT features, planning and tracking of product and test engineering work packages. Achieved qualification of low power DDR product ahead of schedule despite reduced staffing. Supported and executed concept and feasibility studies for low power DDR/DDR2 products based on advanced technology nodes. Key contributor to secure MobilDDR business resulting in significant cash generation.

  • 5 years and 8 months, Jan 2001 - Aug 2006

    Senior Staff Engineer

    Infineon Technologies

    Established CellularRAM known good die 'KGD' business. Responsible for planning and tracking of design verification on multiple DRAM development projects. Design analysis and characterization expert for DRAM products. Team leader for design analysis group. Founding member of Infineon's memory development site in Vermont. Defined equipment to be purchases and supervised setup of bench lab at new development center.

  • 1 year and 11 months, Feb 1999 - Dec 2000

    Staff Engineer

    Siemens Microelectronics

    Lead engineer of design analysis bench team working on advanced DRAM products. Achieved successful Intel validation for 256M DDR 266.

  • 4 years and 6 months, Aug 1994 - Jan 1999

    Failure Analysis Engineer


    Failure analysis (new designs and customer returns), technology/process evaluation and circuit modification using leading edge equipment (SEM, EMMI, FIB). Responsible for training of 30+ FA engineers (Munich, Dresden, Malaysia, Taiwan). Development of new FA preparation techniques (paper presentation at ISTFA 1998).

Educational background for Harald Lorenz

  • 5 years and 10 months, Oct 1988 - Jul 1994

    Physikalische Technik / Mikrosytemtechnik

    Fachhochschule Muenchen


  • English


  • German

    First language


Skiing (Alpine)

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