
Kadir Tastepe
Fähigkeiten und Kenntnisse
Werdegang
Berufserfahrung von Kadir Tastepe
A Multimodal Agentic Retrieval-Augmented Generation (RAG) pipeline with a transformer-based anonymization feature has been developed to serve as an LLM-integrated SlackBot for large-scale document processing. This work involves multicore threading, creative optimization strategies, and leveraging hardware architectures to accelerate cloud-based systems.
Supported operations in S/4HANA Cloud Foundation through Python-automated workflows for reporting and error tracking, managed IAM adoption tasks and stakeholder communications, maintained JIRA dashboards and Wiki documentation, handled customer tickets and incident monitoring, and coordinated operational tasks including shift planning and internal events.
In collaboration with students from ETH Zurich and JGU Mainz, an experimental setup has been built to measure the lifetime of charged pions by integrating a nuclear instrumentation module (NIM), a spectrometer, scintillator counters, a degrader, and a calorimeter. Our collective efforts led to a successful measurement of the charged pion lifetime and the branching ratio to electrons versus muons at the πM1 beamline, with systematic and statistical uncertainties, in good agreement with the PDG value.
- 3 Monate, Juli 2022 - Sep. 2022
Scientific Research Assistant
Physikalisches Institut Heidelberg
The impact of increased magnetic field strength and sensor thickness on the physics performance of the Mu3e experiment has been investigated to guide the optimization of the detector design. The spectrometer’s magnetic field was simulated in Mathematica using neodymium magnets to separate electrons and positrons.
Ausbildung von Kadir Tastepe
- 3 Jahre und 6 Monate, Apr. 2022 - Sep. 2025
Physics
Ruprecht-Karls-Universität Heidelberg
Master's Thesis: High-Level Synthesis-Based FPGA Implementation of the General Triplet Track Fit for Real-Time Particle Tracking To address the challenges posed by the upcoming High Luminosity upgrade of the Large Hadron Collider (HL-LHC), a pipelined FPGA prototype for the General Triplet Track Fit algorithm has been developed using High-Level Synthesis on an AMD Xilinx Alveo U280 accelerator card.
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Englisch
C1 (Fließend)
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