Kumar Rajeev Ranjan

Responsible for the design and implementation of software components in an agile environment. • Actively involved in design decisions and implementation of software components • Backlog grooming, sprint planning and coordination of software development • Development of application framework for V2X solutions • An active member of Car-2-Car Consortium for working group - CG Security

• Responsible for design and implementation of software components and its integration in yocto • Configuring kernel, u-boot and integrating/porting drivers to enable/disable • Evaluating 3rd party software solutions for various applications and their integration • Preparing development infrastructure for development, continuous integration and quality compliance • Developing release management and baselining of software components for delivery

• Requirement analysis and tracking of top 100 important modem features, bands and CA requirement for Tier 1 operators and its validation • Managing and coordinating other interns for tool development, coordination among content provider, tool users and updating tool with latest information

Thesis Topic: Dynamic Power Analysis using Virtual Prototype The thesis aims to develop a system level power model for a baseband processor of a mobile SoC for early power debug and analysis • Create monitor module for tracing power related information for processor core and peripherals • Compare and correlate the simulated power against existing silicon measurements • Create a graphical output (GUI) for displaying the current values over time

Tool development for tracking modem features (Tool Name: Top100) - Tracking of more than 100 key modem features of OEMs, operators, network vendors and chipset manufacturers - Various access right and security implementation to protect data and tool Data Flow Model for GNSS Module - Implementation of data flow model for GNSS Module of platform SoC written in C

Job Role: Design, Audit and Optimization of Core Networks Project #1 Network Audit and Optimization - End to End Analysis of Call Setup time and its benchmarking - Analysis of Key Performance Indexes of Core Nodes and Radio Networks Project #2 Network Design and Planning - Preparation of Detailed Level Design of Media-Gateway - Study and analysis of migration impact in Core Network during deployment

Electronic Design Automation, Advanced Topics in IC Design , Multimedia Communications, High Speed Digital CMOS Circuits, Chip Multicore Processors, System-on-Chip Platforms, Broadband Communication Networks, Embedded Systems and Security

Digital Electronics and Logic Design, Engineering Mathematics, Electrical Circuit Theory Data Structure, Communication Theory, Advance Digital Communication, Data Communication and Networks Digital Signal Processing, VLSI Design Techniques