Lathif Sharieff

• Architected and implemented a high-performance DSP engine with MFCC extraction for a custom ML accelerator, specifically designed for efficient audio processing in ML applications. • Engineered a custom FFT core, FIR and Hamming filters for efficient audio processing, and a robust AHB protocol for seamless integration into the UltraTrail accelerator, showcasing accuracy and speed.

• Assisted in the development and implementation of the RTL design and architecture for NCE • Implemented state-of-the-art interconnection bus interfaces (AXI4) • Executed RTL simulation of the previously developed AI IP, CESARIA • Contributed to the micro-architecture design of AI IP, utilizing domain knowledge of AI accelerators • Conducted extensive research and analysis of AI HW accelerator papers, applying insights gained from these studies to refine the development of the company’s AI IP.

• Developed an electro-chemical sensor system with the LPC1343 kit (Arm Cortex M3 microcontroller) and tested various metal samples for cyclic voltammetry. • Engineered new 3D printing methodologies and structures for Tactile display and tested the structure in different environments using Arduino. • The final results were evaluated using HTerm and the results were analyzed using Origin.

1. Trained in MSP430 and ARM Cortex M4. 2. Configured embedded web server and cloud communication.1. Trained in MSP430 and ARM Cortex M4. 2. Configured embedded web server and cloud communication. Skills: Embedded Systems · MSP430 · Internet of Things (IoT)

Skills: Artificial Intelligence (AI) · Artificial Neural Networks · TinyML