Dipl.-Ing. Thomas Klumpp

• Owner of different FPGA-Projects for Camera Applications: Imager-IF, Video Processing, IO-Control, PCIe-IF to CPU, AXI-Infrastructure • Maintainer of a VHDL-IP Library (VHDL, Documentation, Confluence-Site) • IPs for Video Processing • Work-Flows with Makefiles, TCL- and Python-Scripts • Modelling using Matlab or Python • Hardware Validation • Project Management/Colaboration: JIRA, Confluence, Status Reporting, Agile Methods • Xilinx FPGAs (7-Series: Kintex, Artix; ZYNQ)

• SoC Verification • STA and Timing Closure

• Finally, one year searching for a new job after release from Micronas after closure of the Consumer segment • Several Qualification Measures: Coaching, C++ Training, Projectmanager (IHK), C# Training

• Development of ICs / ASICs for TV Applications • VHDL and Verilog Design and Verification • Chiplevel Synthesis of high-complex System-on-Chips (SoCs) • Sign-off STA (Static Timing Analysis) of high-complex SoCs • Place and Route of high-complex SoCs • Synopys-Tools, some Cadence Tools

• Development of an ASIC including a System-on-Chip with embedded ARM CPU • Development of an FPGA with integrated I2C Master und Slave • VHDL Design, Verification • Test Software in Assembler and C • Hardware-/Software Co-Simulation

• Education • Responsible for "Labor für Schaltungstechnik“ • Supporting Studien- and Diplomarbeiten • Development of Prototypes from different In-House developed ASICs (SoCs with embedded In-House developed CPU) • Software development for embedded CPU and PC (MS-DOS) in Assembler and C for communication and operation

• Nachrichtentechnik • Digitale Signalverarbeitung • Hochfrequenztechnik