Aravind Sathyanarayana Rao

-Evaluation of IEEE802.1AS IP core using UVM -Development of an concept for verification of communication IP cores with Universal Verification Methodology(UVM) using IEEE802.1AS as example

-Investigating various methods and frameworkds for verification -Basic implementation of UVM for Automotive Ethernet(IEEE802.1AS) in Cadence ICS

-Conceptualizing UVM for IEEE802.1AS IP core -Literature survey on Time synchronization with IEEE802.1AS

- To implement Universal Verification Methodology (UVM) for JTAG interface in System Verilog - The Verification component had the functionality of JTAG interface - The Verification component had the capability to execute 5 important BSCAN instructions​

- Worked on designing of a PCB schematic of External Memory Interfacing using AT89S52 Microcontroller using OrCad - The other tasks also included, programming in Kiel uVision and basic designing in LabView​​

Smart sensor systems, Real time systems, Electronic Design Automation, Design of software for Embedded Systems, System Design