Ing. Mayank Pedhadiya

I am an FPGA and digital design engineer working on hardware verification for neuromorphic systems. Currently, I am developing model-agnostic automated testbenches for spiking neurons using Cocotb and Python to streamline FPGA verification and ensure reliable, high-performance hardware. I enjoy building test frameworks, verifying complex digital systems, and bridging hardware-software design. Skilled in FPGA design, HDL programming, embedded systems, and automated verification.

ASIC Design Engineer at IndieSemiC with experience in designing, implementing, and verifying digital ICs from specification to tape-out. Skilled in RTL design, synthesis, timing closure, and verification using industry-standard EDA tools. Passionate about building high-performance, low-power, and scalable semiconductor solutions.

Relevant subjects Final Project: Three tank control systems using MATLAB Real-Time S/w Development System On Chip Design Digital Design with VHDL(FPGA) Medical Systems (DSP) Industrial Systems Discrete Control Systems Relevant subjects Final Project: Three tank control systems using MATLAB Real-Time S/w Development System On Chip Design Digital Design with VHDL(FPGA) Medical Systems (DSP) Industrial Systems Discrete Control Systems

Relevant subjects Computer Programming Utilization, Control System Engineering Digital Electronic, Digital Communication, Digital Signal Processing, Wireless Communication System Electronic Drives and Circuit, Circuit Network, Analog circuit Design Micro Processor & microcontroller and Interfacing Signal System, VLSI Technology and Design Data Communication & Networking