Dominik Vogel

Dual student in Nokia's R&D organization with project assignments in several teams. Bachelor's thesis (grade 1.3, German scale): parameterizable VHDL gearbox for bus-width conversion in high-speed ASICs, verified with an automated Python and VHDL testbench. Built an optical testbed for a QKD feasibility study and automated its measurements in Python. Further projects: object recognition with OpenCV and adaptive video streaming (6G-ANNA), Raspberry Pi-based conveyor control.

Chaired the regular meetings, led the organization team and co-organized events such as Girls'Day.

Led the project group improving a school's water supply in Rwanda and developed a modular slow sand filter.

Focus: digital IC design and EDA. Current grade 1.6 (German scale, 1.0 = best). Courses: Synthesis of Digital Systems, HW/SW Codesign, Circuit Design for Security, VHDL System Design Laboratory.

Dual study program with Nokia, final grade 1.7 (German scale, 1.0 = best), completed in standard time. Electives incl. Analog Integrated Circuit Design, Design of Complex Digital Circuits, Implementation of ML on Hardware.