Sandeep Gowda Gabbalagodu Puttaswamy

• Designed and implemented an algorithm in VHDL to run two polygon scanners synchronously with an error margin less than 0.05% • Wrote low-level bare metal applications for TCP/IP, SPI, I2C in embedded C • Developed an asymmetric multiprocessor system for running ARM A53 and R5 processors • RTL implementation using VHDL, writing test benches and functional verification of kernels • Supporting FPGA board development–I/O pin planning, create and execute plans to support debug, and validate designs

• Designed digital low pass filters and decimators for multi-rate signal processing for FMCW radar signal for automotive application. • Development platform: Xilinx VIVADO; Programming language: VHDL. • Writing test benches for the verification of the design. • Implementation of the design on the FPGA. • Wrote a bare metal application in c to establish data communication between FPGA board and computer using TCP/IP. • Post-processing of the data using MATLAB for target detection

• Designed Gibabit Ethernet communication for transferring data from memory of Zynq Ultrascale+ ZCU102 evaluation kit to a PC. • Bare metal application was programmed in C language. • Used Lightweight IP (lwIP) TCP/IP networking stack running on ARM cortex A53 processor. • MATLAB script is used at the PC for capturing the data packets.

Worked as a Defect Manager for one of the banking project. Tracking and ensuring the defects in the project are fixed and the overall project meets the client's requirement on priority basis. Used HP-QC and HP-ALM tools to monitor the project progress. Coordinating with client for resolution of queries and routine follow-up for updates on outstanding defects. Preparing daily reports and status calls for effective defect tracking and reporting to improve communications and reduce delay