
Dr. Iuliana Bacivarov
Fähigkeiten und Kenntnisse
Werdegang
Berufserfahrung von Iuliana Bacivarov
- 8 Jahre, Sep. 2006 - Aug. 2014
Senior Scientist
ETH-Zurich
- Project coordination, grant applications - Research and development on scalable, high-performance, low-power embedded systems, high-performance computing systems, distributed computing, performance analysis, system optimization, multi-core systems - Initiating, coordinating and giving lectures and tutorials on “Hardware/Software Co-design”
- 4 Jahre und 1 Monat, Sep. 2002 - Sep. 2006
Research and Teaching Assistant
National Polytechnic Institute of Grenoble/TIMA Labs
- Research and Development on hardware-software co-design of system-on-chip architectures (design automation, co-simulation, operating systems, network-on-chip) - Teaching on basic electronics, databases, multi-processor system-on-chip design, digital systems synthesis
- 2 Jahre und 1 Monat, Sep. 2000 - Sep. 2002
Research and Teaching Assistant
National Polytechnic Institute of Bucharest
- Research and Development on data acquisition systems, fault detection in digital systems, reliability enhancement and validation of complex electronic systems - Teaching operating systems and system software
Ausbildung von Iuliana Bacivarov
- 2003 - 2006
Computing Systems Architecture
National Polytechnic Institute of Grenoble (INPG)
hardware-software codesign, multi-processor systems-on-chip, embedded operating system, network-on-chip, co-simulation, performance analysis, computer aided design, design automation
- 2002 - 2003
Computing Systems Architecture
Université Joseph Fourier (Grenoble I)
digital design, multi-processor system design, microelectronics, integrated systems
- 2002 - 2003
Quality Engineering and Reliability
National Polytechnic Institute of Bucharest (UPB)
quality, dependability (reliability, maintainability, safety & security) and electronic technology
- 1997 - 2002
Electronics and Telecommunications
National Polytechnic Institute of Bucharest (UPB)
computer systems architecture
