Ivan Grafskiy

Developed platform-independent digital signal processing blocks for multirate baseband IP, utilizing super sample rate architecture with testing on real hardware. Optimized DSP architecture for high-speed throughput and reduced by 50% the amount of DSP cells in key blocks Integrated the DSP RTL environment with RF models to enable seamless cross-domain simulation and verification

RTL design for cryptography, networking 10G/100G, digital signal processing

DO-254/DO-178, SoC-based design for aviation and UAVs

Changing the World with FPGA, C++, Python at Self-Driving Car project.

Developing control system for shunt reactor of system of compensating reactive power. Developing architecture of project, writing RTL models and testbenches with Verilog/SystemVerilog, writing baremetal and linux applications on ZYNQ chip. Debugging PCB and hardware issues.

Developing flight-by-wire control system for helicopter Ansat.

Developing PCI-E based interface for control and data processing systems of Synthetic Radar Aperture

Specialist thesys - Developing PCI-E interface of control and data processing system of Synthetic Aperture Radar.