Jan Boril

- SoC concept and architecture - Digital RTL design (VHDL, Verilog) - Functional verification (Specman-e, SystemVerilog-UVM, SystemC) - Embedded software development (C/C++)

Wireless LAN, Bluetooth IP SoC design SoC building blocks design and verification(Power, Reset and Clock management, 802.11a/b/g baseband), SoC system architecture - power consumption analysis, technology selection, pre-sales activities,

RTL top level verification of complex Multi-core system (OMAP4) with network on chip interconnect. Module drivers and libraries in C/Specman development (NAND/NOR/SRAM, SDIO/MMC, Audio, Power, Reset and Clock management, Serial communication, etc.)

ultra low power ASIC designs - complete flow from spec. to silicon (8-bit CPUs, DSP, 3-axis accelerometer,...), 8-bit CPU emulator FPGA board development, customer support, RTL design in VHDL, Verilog, C/C++, Assembler programming and Bash,Perl and TCL scripting

Electronic systems theory, DSP, digital design Thesis: Ethernet MAC IP design