Jose Cubero

PhD Student and Research Assistant at the Institute for Communication Technologies and Embedded Systems, RWTH Aachen University

Delivering solutions for next generation ADAS systems. SoC architecture, System Engineering. * Creation of HW and SW concepts * Modelling and analysis of system timing, DDR bandwidth and power consumption. * Optimization of SoC architecture: bus, inter-module synchronization and caches. * Development of proof-of-concept applications and benchmarks. * Support on the conceptualization and assesment of safety mechanisms (ISO-26262). * 3rd party management for outsourcing. * Level 2 customer support.

Automotive SW Integration and Testing for Dual Clutch Transmission systems (DCTs) Main duties: * Integration from diverse SW components for an ECU application. * SW release and version control management. * Execution of Integration tests in a Hardware in the Loop setting. * Support for extending the test automation environment. Perl, Python, Windows Batch. * Debugging and analysis of integration issues and SW failures. * HW resource consumption analysis. CPU Load, Stack and Memory use.

Post-silicon functional test generation: * Design of functional test cases, focus on the cache coherence system. * Implementation and RTL simulation of functional tests in IA32 Assembler. * Physical fault and functional coverage analysis (Fault Grading). * Development of scripts for automatic test generation.

System on Chip Design HW/SW co-design Virtual Platforms Embedded Linux FPGA and ASIC design

computer architecture, hardware development, micro-controllers, control systems.