
Dipl.-Ing. Juan Manuel Mico Soler
Fähigkeiten und Kenntnisse
Werdegang
Berufserfahrung von Juan Manuel Mico Soler
- Bis heute 4 Jahre und 2 Monate, seit Sep. 2021
R&D Director division ***
Power Electronics
Manage Vehicle Engineering Team within Vehicle Integration - Prototype builds (incl. High Volt) - Wintertest Season management - Customer Presentations
- 3 Jahre und 3 Monate, Aug. 2013 - Okt. 2016
Vehicle Integration Engineer
GKN Driveline International GmbH
Functional SW development, integration and calibration for Advanced AWD Powertrains.
- 1 Jahr und 1 Monat, Aug. 2012 - Aug. 2013
Vehicle Control and Simulation Engineer
GKN Driveline International
- 2 Jahre und 4 Monate, Apr. 2010 - Juli 2012
Transmissions Controls
GETRAG Ford Transmissions
SW control for Range Extender hybrid powertrain in a PHEV.
- 2 Jahre und 8 Monate, Aug. 2007 - März 2010
Control Engineer
GETRAG Driveline Systems GmbH
Control Engineer. Developing from begin to end, the software that controls state-of-the-art gearboxes and PTU/RDUs. Active yaw and Eco-disconnect systems. Including electric layout and required HW for the powertrain subsystem. CAN bus, ECU, Matlab-Simulink...everyday.
- 7 Monate, Feb. 2007 - Aug. 2007
Embedded Software Engineer
Windhoff Software Services
As a SW consultant, I was working 5 months at Philips Semiconductors Hamburg (NXP) Coding a test suite with VisualBasic and C++, to help testing PCI DVBT Video cards. Later, one month at Siemens, Paderborn; working as test integration Engineer for the Hipath VoIP phone platform under linux systems.
- 2 Monate, Dez. 2006 - Jan. 2007
Technical support Microsoft XBOX360
Arvato Direct Services
As a bridge between my Spanish career and my German one, I worked providing technical support on the phone to customers calling from English speaking countries from within the EMEA region.
- 1 Jahr und 4 Monate, Juni 2005 - Sep. 2006
Research and Development Engineer
Design Of Systems On Silicon, DS2
Working for the CPU design group for a Powerline modem ASIC. (Embedded CPU, code written in Assembler and C). Master's Thesis during the first half year, named: "Analysis and Optimization of the 32bit RISC processor and its Memory Controller performance in DS2's new 200Mbps powerline modem chipsets"
Ausbildung von Juan Manuel Mico Soler
- 1 Jahr und 5 Monate, Aug. 2004 - Dez. 2005
Microelectronics, digital sub-micron design, SoC design
Royal Institute of Technology, KTH Stockholm, Sweden
VHDL, Embedded SW, fault tolerant systems.
- 4 Jahre und 11 Monate, Sep. 1998 - Juli 2003
Industrial automation and electronic systems
Universidad Politécnica de Valencia, Spain
Embedded Systems, digital control systems and automation.
Sprachen
Deutsch
Fließend
Englisch
Fließend
Spanisch
Muttersprache
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