Kanhaiyalal Mantri

Functional Modelling and Verification of Hardware in SystemC

Functional verification of Application Specific Integrated Circuits (ASICs) in the SWI-CTS (Chirp Transform Spectrometer) for JUICE (Jupiter Icy Moon Explorer - ESA2022) project. Responsibilities -Verification of ASIC’s SPI communication using Logic Analyzer (TLA 714) -Measuring ASIC’s DAC (4 bit, 16GS/s) & ADC (8 Bits 1GS/s) static and dynamic parameters -Documentation (Test Plan, Test Procedure, and Test Report)

Thesis :- "Implementation of an FPGA IP core and Linux drivers for high-speed communication via PCIe, Benchmarking with Xillybus and comparison with Ethernet" Task - • Design and Development of custom FPGA IP Core for PCI Express (PCIe). • Bus Master DMA (Direct Memory Access) implementation for PCIe • Development of Linux Device Driver for Custom PCIe IP core. • Benchmarking with Xillybus and comparison between PCIe & Gigabit Ethernet

1) Sensor for FPGA • Literature research on Aging effect in FPGA • Suggest suitable method for on-chip aging detection for FPGA 2) Further Development of Specification Tools “SpecScribe” • Analysis and Introspection of Python “Specscribe” Data Object • Python programming for dynamic generation of the Unified Power Format description from hardware specification in “Specscribe” tool. • Verification & Validation of generated script

Project #2: Keep It Clean Client: British Telecom Global Services (BTGS) Jul 2011 - Aug 2012 Data Analyst and Programmer for BTGS • Analyse, Find and resolve data discrepancy in BTGS systems. • Preparing data discrepancy reports for client & management Project #1: BTCom-Dev-eComm Client: British Telecom (UK) Jun 2010-Jun 2011 Application Developer for bt.com • Re-skin, code refactoring and J-unit for “bt.com” • Product Build, Product configuration on “bt.com”

Focus on: System Design, Micro & Nano Devices, Micro System Design

Focus on: VLSI Design, Embedded System, μ-processor, μ-controller, Data Structure, Analog & Digital Communication