Manas Vartak

Angestellt, Test Engineer, KPIT Technologies
Deggendorf, Germany

Skills

Altium Designer
EAGLE
Vector CANalyzer
ECU TEST
ETAS INCA
Hardware
Circuit design
LTspice
KiCad
Test Automation

Timeline

Professional experience for Manas Vartak

  • Current 2 years and 7 months, since Apr 2024

    Test Engineer

    KPIT Technologies
  • 7 months, Dec 2022 - Jun 2023

    Master Thesis

    RWU Ravensburg Weingarten University - Hochschule Ravensburg-Weingarten

    - Strong understanding of Typhoon HIL Control Center and created the virtual environment of the ECU - Designing and implementing communication protocols for STM32 H7 by creating its source and header files. - Proficient in multiple bus protocols such as Ethernet, SPI, I2C, UART, and CAN - CAN communication setup is used in HIL unit to send CAN message to the STM32 to receive those messages - To read those messages STM Studio is used

  • 4 months, Nov 2022 - Feb 2023

    Research Assistant

    RWU Ravensburg Weingarten University - Hochschule Ravensburg-Weingarten

    - Proficient in using PCB circuit design software such as Altium Designer, Eagle PCB - Designing and developing multi-layer PCBs for HIL system - Created schematic diagrams and schematic capture for complex PCB of HIL - 4-layer PCB is used because of multiple connections - Layer 3 is used for complete ground plane to reduce the EMC between low voltage lines and high frequency lines

Educational background for Manas Vartak

  • 1 year and 9 months, Oct 2021 - Jun 2023

    Information technology

    SRH Hochschule Heidelberg

  • 3 years and 8 months, Oct 2016 - May 2020

    Electronics and Communication Engineering

    Thakur College of Engineering and Technology

  • 2 years and 8 months, Oct 2013 - May 2016

    Electronics and Communication Engineering

    Sardar Vallabhbhai Patel Polytechnic

Languages

  • English

    C1 (Fluent)

  • German

    B1-B2 (Good)

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