Pooja Lokesh

• Designed digital components in Verilog • Performed lint checks on Verilog codes • Extracted data from collabnet and implemented VBA macros in excel to generate statistical data which gives project progress overview • Working on top level test case for SFR (Special Function Register) verification

• Performed Mixed Signal Static Timing Analysis (MSSTA) of blocks. • Created GUI for the simplified operation of MSSTA flow

• Performed layout verification of multiple digital blocks with different process nodes and low power requirements (using Synopsys-ICC/ICC2) • Performed reliability verification and RC extraction of multiple digital blocks. • Performed power delivery network checks of different blocks • Performed Place and Route of different partitions (in ICC)

Created protype of sensor to monitor oil debris in aircraft engine oil to address costly inflight shutdowns

Verilog, Analog and Digital electronics, Control Systems, Digital Signal processing, Low power VLSI, C- programming, C++, Network theory, Electronic devices and circuits, Signals and Systems, Digital Communication,