Pravin Gavate
Angestellt, Pre-Si Validation Lead, Intel Corp.
Abschluss: Bachelor of Engineering, University of Pune
Bangalore, India
Skills
Timeline
Professional experience for Pravin Gavate
Pre Silicon and Post Silicon Validation Lead
- 2 years and 7 months, May 2018 - Nov 2020
Technical Manager
UST Global
- 3 years and 5 months, Jan 2015 - May 2018
Technical Leader
Aricent
- 1 year and 7 months, Mar 2013 - Sep 2014
Senior Design Engineer
NVIDIA
- 2 years and 3 months, Jan 2011 - Mar 2013
Senior Design Engineer
LSI Logic
- 4 years and 4 months, Sep 2006 - Dec 2010
Module Lead R/D Services
MindTree Ltd.
Educational background for Pravin Gavate
- 4 years and 3 months, Jun 1999 - Aug 2003
Electronics and Communication Engineering
University of Pune
Languages
English
Fluent
German
Basic
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