ROSHAN ALI SK

Angestellt, Design Verification Engineer, NVIDIA

Bangalore, State of Karnataka, India, Indien

Über mich

I Had 2 years of Experience in Design Verification and Power-Aware Verification. I'm working as Design Verification Engineer at Nvidia, India, and completed Masters in Electronic and Communication Engineering specialized in VLSI DESIGN at the International Institute of Information Technology Bangalore, India Having strong fundamentals in Digital Design, STA, ASIC Design flow, and FPGA flow.Having good knowledge of SV, UVM, and UPF. Have strong Debugging skills.

Fähigkeiten und Kenntnisse

systemverilog
Verilog
uvm
Digital Design
ASIC
Perl Scripting
python
I2C
spi
axi
upf
systemverilog assertion
C
power aware verification
risc v
synopsis
Debugging
Design Verification
asic design flow
sta

Werdegang

Berufserfahrung von ROSHAN ALI SK

  • Bis heute 2 Jahre und 11 Monate, seit Aug. 2021

    Design Verification Engineer

    NVIDIA

    VCS NLP with MVSIM Debug VCS NLP with MVSIM Regression Improvement – Developed an Automatic Triage Flow (ATF) using Python, and Perl – Created Automatic Launch, Relaunch, Bug Filing, and Dashboard update sections. – Automation Bug filing and Bug update for failed tests using REST AP I’s • NLP Environment Bring Up for Power Aware Verification (PAV) Simulations – Debugged and resolved multiple errors related to UPF Errors – Checked and reviewed the NLP Pre-simulation checklist

  • 8 Monate, Dez. 2020 - Juli 2021

    Design Verification Engineer

    SiFive

    Developed hierarchical UPF files for three power domains(SOC, CPU, and AON) using UPF 2.1 separately and includes isolation and level shifter strategy. • Worked on developing SystemVerilog assertions to check the correctness of the isolation strategy of UPF of each IP, by checking their clamp values. • Developed verification environment to execute packet switching according to its protocols and coverage to check the data using System Verilog and UVM for a router design.

Sprachen

  • Englisch

    Fließend

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