TW Huang

Bis 2025, Principal Digital Verification Lead, NXP Semiconductors
Abschluss: M.S., The University of Texas at Austin
Graz, Österreich

Fähigkeiten und Kenntnisse

SystemVerilog
UVM
Verilog
Formal
Asic verification engineer
Python
SVA
Digital design
VMM
FPGA
Perl
C
C++
Tcl
Scrum
Assembly
VHDL
Project Management
Requirement Management
Design Failure Mode and Effect Analysis
Formal Verification
Assertion

Werdegang

Berufserfahrung von TW Huang

  • 2 Jahre und 11 Monate, März 2022 - Jan. 2025

    Principal Digital Verification Lead

    NXP Semiconductors

    • Led verification activities for automotive battery controller projects within Battery Management Systems (BMS) group. • Developed & optimized verification testbenches and workflows for cutting-edge technologies. • Reviewed safety requirements and ensured high functional coverage across all features.

  • 6 Jahre und 9 Monate, Juni 2015 - Feb. 2022

    Principal Digital Verification Engineer

    Dialog Semiconductor

    • Achieved high coverage for digital control functions in PMIC/GreenPAK projects. • Collaborated with cross-functional teams across multiple countries on diverse projects. • Enhanced verification processes by integrating UVM & Formal testing methodologies. • Expanded verification of A/D interface behavior utilizing AMS & analog models. • Accelerated project timelines by providing support to Analog, Application and Test teams.

  • 3 Jahre und 5 Monate, Feb. 2012 - Juni 2015

    ASIC Design Verification Engineer

    Marvell Semiconductors

    • Identified and resolved multiple system-level design issues in HDD controller SoC projects. • Transitioned sub-system & chip-level testbenches from VMM to UVM. • Collaborated with design & verification teams to verify SATA & PCIe functionalities. • Enhanced project migration efficiency by developing a Perl utility to automate C library translation to SystemVerilog.

  • 1 Jahr und 3 Monate, Dez. 2010 - Feb. 2012

    Design Verification Engineer

    Mediatek

    • Developed test plans and verified multiple blocks in high-end smartphone ICs. • Created and optimized functional tests to achieve high coverage prior to tape-outs. • Gained expertise in verification methodologies including VMM, Formal, and SVA. • Attained over 99% coverage for AVS, SPI, auxiliary ADC control designs.

  • 1 Jahr, Jan. 2009 - Dez. 2009

    Co-op Engineer

    Advanced Micro Devices GmbH

    • Developed, integrated, and optimized test programs for silicon development within product development group. • Created tests & scripts, led debug efforts, conducted code reviews and documented processes for CPU testing.

  • 4 Monate, Mai 2007 - Aug. 2007

    Engineering Intern

    AREVA T&D

    • Contributed to testing and validation of the Transpower New Zealand market system project. • Conducted database studies to support and streamline future project development initiatives.

Ausbildung von TW Huang

  • 2 Jahre und 5 Monate, Aug. 2007 - Dez. 2009

    Electrical and Computer Engineering

    The University of Texas at Austin

  • 2 Jahre und 10 Monate, Sep. 2003 - Juni 2006

    Electrical Engineering

    University of Washington

    Dean's List for Spring quarter 2004 and all quarters in 2005-2006

  • 3 Jahre und 3 Monate, Mai 2000 - Juli 2003

    Computer Engineering

    Temasek Polytechnic

    Director’s List for all three years

Sprachen

  • Chinesisch

    Muttersprache

  • Englisch

    Fließend

  • Japanisch

    Grundlagen

  • Deutsch

    Grundlagen

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