Mahmud Rezwan Hussain

- Working as Verification Architect and lead as part of a pilot project to define and develop UVM environment from scratch and introduce UVM verification flow to Rambus Netherlands. - Developing custom-made Verification IPs(Clock, Reset, DUT Interface, Cryptography Packet VIP). - Mentoring and leading verification team members to adopt the newly introduced UVM testbench created from scratch.

- Responsible for simulation flow setup and UVM based verification environment development, UVM based test development, and assertion-based verification using SVA. - Developed and integrated Verification IPs(VIPs). - Involved five ASIC development projects in automotive switch products and healthcare IoT applications.

- Design and Verification of Broadcast Video/Image Processing Algorithms and their development into ASIC/FPGA designs using Verilog. - Test automation

Functional Verification of Custom IC and ASIC/FPGA Design.

My current PhD research include wireless body area network, biosensors, ultra low power integrated circuit technology dealing with digital, analog and radio frequency circuit designs for wireless, biomedical, and RF applications.