Randa Zarrouk

• Enhanced RISC-V virtual platforms (32/64-bit, SystemC TLM 2.0) in C++/Python with CCI parameterization and dynamic converters, boosting simulation flexibility and maintainability. • Implemented runtime component-access counters involving cache hits/misses and read/write operations, improving profiling accuracy and enabling targeted performance optimization within the RISC-V virtual platform. • Automated testing and workflows using Python and Bash, leading to more efficient simulations.

• Integrated clone-resistant device identity into privacy-preserving communication platforms, enhancing security and trustworthiness across the network. • Coordinated deliverables and knowledge exchange among 30+ partner organizations, improving clarity, consistency, and collaborative workflow.

Researched, designed, and implemented hardware-based, clone-resistant device identity protocols for trusted computing, using VHDL, Embedded C, and Libero SoC on Microchip non-volatile Cortex-M3 FPGAs, enhancing resistance against physical cloning and key extraction attacks. Authored three peer-reviewed publications on secure boot architectures, group-based device identity, and SUC-enabled physical identity characterization.

Completed a double Master’s through the Erasmus program (ENIT/TU Braunschweig), graduating top of the class with a specialization in Signal Systems Techniques. Master’s thesis: optimized a System-on-Chip design platform and developed a Python script using genetic algorithms (Python, SystemC, C++).

Core Focus areas: mechanics, robotics, computer science, Embedded Systems (STM32, ARM- CortexM, GPIO interfaces, FreeRTOS, Embedded C, LabVIEW, Matlab.