Srujan Ingalgeri

Behavioural Macro Modelling of Power Management IC: Responsible for developing behavioral macro models of PMIC, which can be simulated on computers using tools like PSpice, TINA-TI, SIMPLIS. These models depict the true behaviour of the Integrated Circuit, which are developed based on datasheet specifications and understanding of various DC-DC Switching Regulators such as Buck, Boost, etc. EDA Tools: 1. Cadence Spectre, Virtuoso, Layout XL, Assura 2. Mentor Calibre 3. PSpice 4. SIMPLIS 5. TINA-TI

Analog Layout Engineer: Have designed various Analog blocks like BGR, LDO, OPAMP, PLL, etc. Have good experience and knowledge in, Analog layout designing (Cadence Virtuoso Layout L, XL) Analog layout verification like DRC, LVS, DFM(Assura, Calibre) Good understanding of Analog layout concepts like IC Fabrication, Matching, Shielding, EM, IR, Isolation, Antenna Effect, ESD, and Latch-Up Prevention Techniques. Process Technology Nodes: 1. TSMC 45nm CMOS 2. TSMC 90nm CMOS 3. TSMC 130nm BCD

Analog and Digital Circuits, Analog Electronic Circuits Lab, CMOS VLSI Circuits, Digital Circuits Lab etc

Basic Electrical Engineering, Basic Electronics, Circuit Analysis, Signals & Systems, Control Systems, Embedded System Design, Communication Systems