Akash Biyani

Literature review on PUFs and Post-Quantum Cryptography (PQC) integration strategies. Researching RISC-V Root of Trust (RoT) open-source implementations (OpenTitan, Caliptra) and integrating PUFs into Network-on-Chip (NoC) architectures for improved hardware security.

Reverse-engineered an internal Pipelined Peripheral Bus (PPB) via RTL analysis to reconstruct control paths and register-level address mappings. Deployed a containerised telemetry pipeline (C/Python, TCL, OPC-UA, Prometheus, Grafana) for real-time monitoring of on-chip sensor data.

Ran formal property verification (SVA assertions, property checking) on small RTL designs, such as a synchronous FIFO, using LUBIS EDA's formal-tool flow.

- Contributed to the software module source code implementation for diagnostic features in condition-based monitoring of EP2002 Classic brake systems for rail vehicles, collaborating closely with counterparts in the United Kingdom. - Assembled hardware boards, flashed software, and executed module testing on braking systems. - Worked on integrating a new software update feature using the Ethernet Maintenance Tool.

Graduate Engineering Trainee rotation prior to full-time Embedded Software Engineer role, working on safety-critical driver modules and rail braking systems.

- Performed static code analysis for IBC CID (Integrated Braking System’s Central Intelligence Device) Base Software, implemented Lint fixes, and maintained comprehensive documentation. - Developed Embedded C-based Microcontroller Abstraction Layer Drivers (System Timer Driver and Real-Time Clock Driver) for the CID-Cybersecurity Project, ensuring robust system functionality.

Designed an application-specific data flow diagram and database schema. Performed queries and managed databases in MongoDB and MySQL.

Erasmus+ EMECS joint degree (Year 2 at RPTU Kaiserslautern). Modules: Operating Systems, Real-Time Systems, Power-Aware Embedded Systems, SystemC and Virtual Prototyping. Master's thesis: power gating network islands in a 12nm FinFET SoC.

Erasmus+ EMECS joint degree, Year 1 at University of Southampton, UK. Core modules: Digital System Design and Synthesis, Digital IC and System Design, Embedded Processors, Microfabrication of SoC, Secure Hardware and Embedded Systems.